1. 제목 : Graphene for Beyond CMOS Logic Devices

2. 연사: Dr. Luigi Colombo (Texas Instruments Incorporated)

3. 일시: 8월 10일 수요일 오후 4시~

4. 장소: 301동 1512-2호 세미나실

5. 내용요약: In the past decade, the state of the art Si-based electronics has gone from devices at or above 100 nm to the realm of 30 nm and below, with a defined pathway to devices, logic and memory, of about 15 nm. In addition, as devices have scaled below a gate length of about 100nm performance per power density has not scaled, in fact it has decreased. In order to address the power issues the industry is facing as CMOS devices are scaled further, a program, Nanoelectronic Research Initiative, was created to develop new materials and devices that take advantage of new state variables with the objective of improving performance per power density. Graphene, a mono-layer of carbon atoms arranged in a honeycomb lattice, has recently been subject of considerable theoretical and experimental interest because of its unique transport properties together with exceptional chemical and physical properties. New devices taking advantage of the theoretical prediction on the existence of a Bose-Einstein condensate (BEC) in bi-layer graphene films have been proposed. However, in order to demonstrate the existence of a BEC and new devices, high quality films will have to be developed and integrated with dielectrics and metal contacts.

  High quality graphene can be formed by exfoliation from natural graphite with samples sizes of a few hundred square microns. Graphene can also be grown on SiC substrates by a Si evaporation process from either the Si or C surfaces, but these films are limited to SiC and are difficult to integrate on Si wafers. The successful demonstration and implementation of graphene-based device technology will require synthesis of high quality graphene large are films on substrates other than SiC or the exfoliation of graphene from graphite. The discovery of large-area and monolayer graphene growth on Cu substrates has opened many opportunities for the development of graphene-based devices including transparent conductive electrodes. Growth of graphene on Cu by chemical vapor deposition (CVD) is unlike growth on other substrates such as Ni in that a self-limited monolayer of graphite is grown by a surface mediated process. In order to take full advantage of the fundamental properties of graphene and the synthesis of large area films it is necessary to grow uniform and nearly defect-free films as the semiconductor industry has done with silicon substrates. The objective of this presentation is to present the growth and growth mechanism of graphene on Cu and Ni. I will also present the effect of temperature, pressure, and flow rate and how these parameters affect the structure of graphene and correlate the structural properties to the optical and electrical properties of graphene. In addition I will present data on the integration of dielectrics with graphene and their effects on field effect transistors characteristics                                                               .

6. 약력: Luigi Colombo is a TI Fellow in the External Research Development group at Texas Instruments.  He has a Ph.D. in Materials Science from the University of Rochester. He joined TI in 1981 to work on infrared detector materials where among other materials he developed a HgCdZnTe liquid phase epitaxy process which he also put in production in 1991 and it is still in production. Since then he has been responsible for the development of high-k capacitor MIM structures for DRAMs, development of high-k gate/metal gate transistor gate stack using Hf-based dielectrics, and low leakage SiON based 45 nm transistor gate stack development. He is currently responsible for the development of new materials such as graphene and their integration in new device flows for beyond CMOS device technology as part of the Nanoelectronics Research Initiative. Dr. Colombo has authored and co-authored over 120 refereed papers, made over 140 invited and contributed presentations, has written 3 chapters in edited books, and holds 72 US and 18 international patents. He is also an Adjunct Professor in the Department of Materials Science & Engineering at the University of Texas at Dallas. He is a senior member of the IEEE, and a member of the APS, MRS and AVS                                                                                    .

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